microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 1 copyright ? 2004 rev. 1.1, 2005-02-24 www. microsemi . com lx8820 3.3v/1.0 a ultra low dro p out re g ulator p roduction data sheet tm ? description the lx8820 is an ultra low- dropout single output positive- voltage linear regulator. the regulator has a precise, fixed output capable of delivering 1.2 amps. the lx8820 output is internally programmed for 3.3v. regulator stability is maintained with any capacitor esr, allowing ceramic, tantalum or electrolytic types. capacitance range is flexible beginning with 2.2f to large values. the cmos wafer process increasing regulator efficiency by minimizing operating ground current (typically <200a). compared to bipolar technology . the low rds on of the pmos output stage results in ultra low dropout (typically 0.45v @ 1a). output voltage overshoot is controlled using slew rate control, as v in is applied, typically v out overshoot < 2% for v in 1v/s ramp. transient response to a step load is fast and controlled, v out overshoot remains within 2% of nominal for 400ma step sizes. thermal shutdown, current limit and short circuit current protection are integrated on-chip for survival during fault conditions. microsemi?s small 3x3mm body size (mo-229) package enables maximum power dissipation with a minimum surface mount area. important: for the most current data, consult microsemi ?s website: http://www.microsemi.com key features ? accurate output voltage ? typical dropout of 0.7v at 1a and 0.25v at 0.8a ? independent thermal and current limit protection ? low tolerance load regulation (0.4%) ? wide dc supply voltage of 4v to 10v ? loop stability independent of output capacitor type ? jedec mo-229 surface mount package / rohs compliant applications/benefits ? 5v to 3.3v regulators ? hard disk drives, cd-roms ? adsl and cable modems ? battery charging circuits ? instrumentation ? pc peripherals application circuits v in gnd n.c. v out v out v in 4.7f v in 3.8 to 6v 4.7f v out 3.3v @ 1a lx8820 1 2 34 5 6 package order info lm plastic mlp 6- pin t j ( c) o utput v rohs compliant / pb-free part marking 0 to 125 3.3v LX8820-33CLM 882j or 8820 note: available in tape & reel. append the letters ?tr? to the part number. (i.e. LX8820-33CLM-tr) l l x x 8 8 8 8 2 2 0 0
microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 2 copyright ? 2004 rev. 1.1, 2005-02-24 www. microsemi . com lx8820 3.3v/1.0 a ultra low dro p out re g ulator p roduction data sheet tm ? absolute maximum ratings input voltage (v in ) ....................................................................................................... 10v load current (interna lly limited)................................................................................... 2a power dissipa tion ................................................................................... internally limited short-circuit protec tion ........................................................................................indefinite operating junction temperature................................................................................ 150 c storage temperature ra nge........................................................................ -6 5c to 150c rohs / pb-free peak package solder reflow temperature (40 second maximu m exposure ) ....................................................................260 c (+0,-5) note: exceeding these ratings could cause damage to th e device. all voltages are with respect to ground. currents are positive into, ne gative out of specified terminal. thermal data lm plastic mlp 6-pin t hermal r esistance -j unction to t ab , jt 8c/w t hermal r esistance -j unction to a mbient , ja (typical, depending on mounting/pcb layout) 29-35c/w junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the ther mal performance of the device/pc-board system. all of the above assume no ambient airflow. ja can vary significantly depending on mounting technique. (see application notes section: thermal considerations) package pin out v in gnd n.c. v out v out v in 1 2 34 5 6 lm p ackage (top view) heatsink must be connected to gnd or left floating (see pg 7 for details) . n/c = not internally connected, don?t care for pcb layout consideration. rohs / pb-free 100% matte tin lead finish functional pin description p in n ame d escription v in positive unregulated supply input fo r the regulator. bypass to gnd with at least 2.2f of low esr and esl capacitance. gnd common terminal for ground reference. the input and output bypass capacitor s should be connected to this pin. v out regulator output. it is recommended to bypass to gnd with at least 2.2f. size your output capacitor to meet the transient loading requirement. if you have a very dynamic load, a lower esr capacitor will improve the response to these load steps. recommended max operating conditions lx8820-33 parameter symbol min typ max units input voltage v in 4.5 10 v load current (with adequate heat sinking) i l 1200 ma operating junction temperature t j 125 c p p a a c c k k a a g g e e d d a a t t a a
microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 3 copyright ? 2004 rev. 1.1, 2005-02-24 www. microsemi . com lx8820 3.3v/1.0 a ultra low dro p out re g ulator p roduction data sheet tm ? electrical characteristics unless otherwise specified, the following specifications apply over the operating ambient temperature 0 c t a 125 c except where otherwise noted and the following test conditions: v in = 5v, i out = 10ma, c 1 = 4.7 f (ceramic), c 2 = 4.7 f (ceramic), & t j = t a using low duty cycling methods. lx8820-33 parameter symbol test conditions min typ max units ` fixed output (3.3v) output voltage v out 5ma < i out < 1a, 4.75v < v in < 5.25v 3.234 3.300 3.366 v line regulation ? v out (v in ) 4.5v < v in < 5.5v, 5ma < i out < 1a 4 9 mv load regulation ? v out (i out ) 10ma < i out < 1a, v in = 4.75v 2 15 mv i load = 1a, ? v out = -1% 0.45 v dropout voltage v do i load = 1a, v in = 4.0v 3.0 3.3 3.383 transient response; v out overshoot at start-up v out v in step 0v to 5v; t r 1s; 10ma < i out < 1a note 2 3.63 v transient response; v out droop to step load v out v in = 5v; t r 1s; 10ma < i out < 1a note 2 3.0 v current limit i out (max) v in < 5.5v 1.0 1.5 a minimum load current i l note 1 0 0.1 ma i out =5ma 205 300 quiescent current i q i out =1000ma, v in < 7v 550 650 a ripple rejection psrr f=120hz, v in = 5v 50 75 db rms output noise (% of v out ) v out (rms) 10hz < f < 10khz 0.003 %/v thermal shutdown t jsd 140 160 c note 1: minimum load current is defined as the am ount of output current require d to maintain regulation. note 2: guaranteed by design. block diagram v in gnd v out bias + - 1.25v v ref c1 10f c2 10f lx8820 figure 1 ? fixed output note: application circuit above using ceramic capacitors e e l l e e c c t t r r i i c c a a l l s s
microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 4 copyright ? 2004 rev. 1.1, 2005-02-24 www. microsemi . com lx8820 3.3v/1.0 a ultra low dro p out re g ulator p roduction data sheet tm ? characteristic curves lx8820 temp stability, iout=5ma 3.280 3.282 3.284 3.286 3.288 3.290 3.292 3.294 3.296 3.298 3.300 3.302 3.304 -50 -25 0 25 50 75 100 125 150 temp, c vo volt vin=4.5v vin=5.25v vin=7v step load stability ch1: (blue) v out , ch4: i step 200ma/div, c in = c out = 4.7f ceramic, load current, dc =100ma supply voltage, fast turn on (t rise = 10s) ch1: v in (light blue) ch2: v out , c in = c out = 10f ceramic, load current, dc = 1a short circuit and recovery ch1: v out , ch4: i step , c in = c out = 10f ceramic ch3: (magenta) v out , ch4: i out 1a/div, c in = c out = 10f ceramic c c h h a a r r t t s s
microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 5 copyright ? 2004 rev. 1.1, 2005-02-24 www. microsemi . com lx8820 3.3v/1.0 a ultra low dro p out re g ulator p roduction data sheet tm ? application information description the lx8820 is part of a family of ldo (low drop-out) linear regulators in the jedec mo-229 package that offer maximum power dissipation in a low profile surface mount technology. the lx8820 output is fixed at 3.3v output and can supply up to one amp with a regulator design optimized for system efficiency by consuming minimal ground current a nd directing quiescent current to the load. input capacitor to improve load transient response and noise rejection an input bypass capacitor of at least 2.2f is required. generally we recommend a 4.7f ceramic or tantalum or 22f electrolytic capacitor. output capacitor the regulator requires an output capacitor connected between v out to gnd to stabilize the internal control loop. many types of capacitors are available, with different capacitance values tolerances, temperature coefficients and equivalent series resistance. we recommend a minimu m of 4.7f. to ensure good transient response from the po wer supply system under rapidly changing current load condi tions, designers generally use additional output capacitors connected in parallel. such an arrangement serves to minimize the effects of the parasitic resistance (esr) and inductance (esl) that are present in all capacitors. the regulator has been tested stable with capacitor esr?s in the range of 0.01 to 2 ohms. we have found it best to use the same type of capacitor for both input and output bypass. minimum load requirement the lx8820 has a minimum load requirement for proper output regulation specified at 0.1ma. temperature protection the thermal protection shuts the lx8820 down when the junction temperature exceeds 140c. exposure to absolute maximum rated conditions for extended periods may affect device reliability (see thermal considerations below). current limit protection the lx8820 includes over current protection. when the output load current exceeds ty pically 1.5a, the circui t forces the regulator output to decrease. thermal considerations thermal shutdown protects the integrated circuit from thermal overload caused from a rise in junction temperature during power dissipation. this means of protection is intended for fault protection only and not as a means of current or power limiting during normal application usage. proper thermal evaluation should be done to ensure that the junction temperature dose not exceed it?s maximum rating. operating at the maximum t j of 150c can impact reliability . due to variation in individual device electrical characteristics and thermal resistance , the built in thermal overload protection may be activated at power levels slightly above or below the rated dissipation. also peak output power should be considered for each individual output. power dissipation for the regulat or can be calculated using the following equation: d in(max) out out p=(v -v )?i (note: power dissipation resulting from quiescent (ground) current is negligible) junction temperature of the integrated circuit can be calculated using: ? ? junction junction-tab rise tab-amb rise amb tab d max jt tab-amb d reg pcb t = t + t + t t=p t=p an example: given conditions: t a = 70c, v in = 5.0v, v out = 3.3v, i out = 200ma. calculated values: ?? ? ? j-tab reg tab-amb rise junction t =(5v-3.3v)(200ma)8c/w = (340mw) 8 c/w = 2.7 c t = (340mw) 32 c/w = 10.9 c t = 2.7 c + 10.9 c + 70 c = 83.6 c it is important to note that although each output of the regulator will produce up to 1.5a in current, the total power dissipation may limit the useful total current draw. the junction temperature should be calculated to insure the maximum junction temperature is not exceeded. a a p p p p l l i i c c a a t t i i o o n n s s
microsemi integrated products division 11861 western avenue, garden grove, ca. 92841, 714-898-8121, fax: 714-893-2570 page 6 copyright ? 2004 rev. 1.1, 2005-02-24 www. microsemi . com lx8820 3.3v/1.0 a ultra low dro p out re g ulator p roduction data sheet tm ? mechanical drawings jedec ? mo229 6-pin plastic micro lead package e d e b e2 d2 a3 a1 internally connected together, but isolated from all other terminals l2 l l2 a k m illimeters i nches dim min max min max a 0.80 1.00 0.032 0.040 a1 0.00 0.05 0 0.002 a3 0.20 ref 0.008 ref b 0.30 0.45 0.012 0.018 d 2.90 3.10 0.114 0.122 e 2.90 3.10 0.114 0.122 e 0.95 bsc 0.037 bsc d2 1.90 2.25 0.075 0.086 e2 1.15 1.65 0.045 0.065 k 0.20 - 0.008 - l 0.30 0.45 0.012 0.018 l2 - 0.10 - 0.004 0 12 0 12 notes production data ? information contained in this document is proprietary to microsemi and is current as of publication date. this document may not be modified in any way without the express written consent of microsemi. product processing does not necessarily include testing of all parameters. microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time. m m e e c c h h a a n n i i c c a a l l s s
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